1. Field of the Invention
This invention relates generally to the operation of direct memory access (DMA) operations in computing systems and, more specifically, to a system and method for direct memory access using offsets.
2. Description of the Related Art
Many modern computers and microprocessors allow various hardware subsystems to access system memory directly, that is, without using the central processing unit (CPU) as an intermediary. Direct memory access (DMA) may allow various hardware components, such as disk drive controllers, graphics cards, networking interface controllers, sound cards, or graphical processing units to perform reads and/or writes to memory without occupying the CPU, thereby allowing the CPU to continue to execute other program instructions while a DMA memory access completes. Without DMA, a CPU may be forced to copy each piece of data from a source to destination, during which it would be unavailable for performing other tasks.
For example, a network interface controller may receive network packets from a network connection, store those packets in a local buffer, and then use DMA to move each packet from the local buffer to a buffer in the system memory. For fast packet processing applications, such as a streaming video player for example, the DMA transfer enables the CPU to continue executing packet processing operations on behalf of the application while the network controller concurrently transfers packets to system memory without disturbing the CPU, enabling overall improved packet processing speeds.
In many computer systems, memory is implemented using multiple memory banks. For example, a system may stripe memory across two banks using 64-byte blocks so that every other block is on the same bank (e.g., address 0-63 on bank 1, 64-127 on bank 2, 128-191 on bank 1, etc). Each memory bank may be associated with a unique memory controller, and/or a unique channel of a memory controller, that arbitrates accesses (reads and writes) to memory addresses resident on that bank. In some systems, multiple memory controllers may be employed, each of which is associated with multiple banks of memory.
In many modern computers, bandwidth to memory is an important performance bottleneck. For example, a DMA device may be able to make memory transfer requests to a given memory controller at a rate much greater than that at which the memory controller may be able to satisfy those requests. In such cases, the performance of one or more heavily burdened memory controllers may bottleneck overall system performance.